Design of Approximate Adder for Error Tolerant Application

نویسنده

  • Ashish tiwari
چکیده

the probability of errors in the present VLSI technology is very high and it is increasing with technology scaling. Removing all errors is very expensive task and is not required for certain applications. There are certain application where the approximate result is acceptable e.g. image processing and video processing. For these applications Error Tolerant Adder (ETA) is proposed which provide approximate result at very high speed than the convention adder. The proposed adder provides improvement in delay, power and area at the same time at the cost of accuracy. Simulation result shows improvement in delay, power and area respectively over convention adder. Keywords—Adders, digital signal processing (DSP), error tolerance, high-speed integrated circuits, low-power design, VLSI.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

High Performance Significance Approximation Error Tolerance Adder for Image Processing Applications

Addition is one of the fundamental arithmetic operations which are used extensively in many VLSI systems such as microprocessors and application specific DSP architectures. In this paper, the Significance Approximation Error Tolerant Carry Select Adder (SAET-CSLA) is constructed, which is efficient in terms of accuracy, power and area. While considering the elementary structure of an image proc...

متن کامل

Imprecise Minority-Based Full Adder for ‎Approximate Computing Using CNFETs

   Nowadays, the portable multimedia electronic devices, which employ signal-processing modules, require power aware structures more than ever. For the applications associating with human senses, approximate arithmetic circuits can be considered to improve performance and power efficiency. On the other hand, scaling has led to some limitations in performance of nanoscale circuits. According...

متن کامل

Efficient Approximate Adder Architecture for Error Tolerant Applications with use of new logic values

--------------------------------------------------------------ABSTRACT------------------------------------------------------Ultra-high energy efficiency is required for all the battery operated devices due to increased functionality on the single chip. In conventional digital VLSI design, it is assumed that a circuit/system should function perfectly to provide accurate results.There are many ap...

متن کامل

Evolutionary QCA Fault-Tolerant Reversible Full Adder

Today, the use of CMOS technology for the manufacture of electronic ICs has faced many limitations. Many alternatives to CMOS technology are offered and made every day. Quantum-dot cellular automata (QCA) is one of the most widely used. QCA gates and circuits have many advantages including small size, low power consumption and high speed. On the other hand, using special digital gates called re...

متن کامل

Fault-tolerant adder design in quantum-dot cellular automata

Quantum-dot cellular automata (QCA) are an emerging technology and a possible alternative for faster speed, smaller size, and low power consumption than semiconductor transistor based technologies. Previously, adder designs based on conventional designs were examined for implementation with QCA technology. This paper utilizes the QCA characteristics to design a fault-tolerant adder that is more...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2013